The present invention relates to integrated circuits having voltage dividers or amplifiers. More particularly a device is provided for dividing a voltage across integrated circuit resistors and a differential amplifier is provided having high accuracy, including high signal to distortion performance and high tolerance to large input common mode signals.
Integrated circuits often utilize resistive voltage dividers and differential amplifiers, Electronic resistors are fabricated by using several different techniques. Fabrication methods include depositing a thin or thick resistive films on a substrate or forming a resistive path directly within a substrate, typically silicon, by using a dopant species, Such resistors are often used in microelectronics applications such as integrated circuits and hybrid microcircuits. Such resistors may be used in a resistor divider network that is a discrete circuit or may be used as part of a complicated integrated circuit, Resistive films often include polysilicon or nickel-chrome and dopant species often include boron, phosphorus or arsenic. Regardless of the type of resistor material or fabrication process, the resistance of such a microelectronic resistor can be generally described by Equation 1: ##EQU1## where R is the resistor value in Ohms, .OMEGA./.quadrature. is the sheet resistance in Ohms per square, L is the length of the resistor, and W is the width of the resistor. As known in the art, a square is dimensionless and is simply a portion of the resistor consisting of one unit length and one unit width.
Resistors may be used to create voltage dividers by providing a voltage across or current through the resistor and providing an output connection along some portion of the resistor. An individual voltage output of a microelectronic resistor voltage divider generally has a linear relationship with the voltage input of the resistor voltage divider. Furthermore, a voltage divider may have multiple outputs and each separate voltage output may have a linear relationship with the voltage input. On a voltage divider with multiple outputs, it is instructive to number each output consecutively starting from the top of the resistor divider progressing to the bottom of the resistor divider. When a plot is generated relating the input voltage attenuation of each output voltage to the respective output number, with one axis of the plot being the attenuation value and the other axis being the output number, this plot will be linear or nonlinear plot which is dependent upon the spacing of the outputs of the voltage divider.
Linear voltage dividers are defined as having a substantially linear plot of the voltage attenuation of each output and the related output numbers. Nonlinear voltage dividers are defined as having a substantially nonlinear plot of the voltage attenuation of each output and the related output numbers. The relationship between the outputs of the nonlinear voltage divider may be, for example, a logarithmic function, a square law function, or an exponential function. The individual transfer function between a voltage input and a specific output in a nonlinear voltage divider, though, may still be generally linear.
Voltage or current input and voltage output contact sites or taps may be made to a resistor in a variety of ways. FIG. 1 shows integrated circuit or hybrid microcircuit resistor 1 with taps 2 connecting from the top of the main body of resistor 1. In FIG. 1, taps 2 may simply consist of interconnect contacts, such as aluminum contacts. Alternatively, taps 2 may be upward extensions of the resistive film that are then connected to an interconnect lead. Other tap arrangements exist. For example, FIG. 2 shows resistor 20 having a main body 34 and output taps 22 and 24 which extend from main body 34 in order to provide a location for output contact sites 28 and 30. Input contact sites 26 and 32 are also provided. Many other geometric arrangements may be selected for taps. Furthermore, the tap spacing may be either linear or nonlinear along the resistor body. If all taps are spaced at substantially equal distance intervals along the resistor body, then linear spaced taps are created. Therefore, with linear spacing all resistor segments, whether between an input and an adjacent output or between adjacent outputs, are of equal length. If the taps are spaced such that all resistor segments are not of equal length than nonlinear tap spacing has been created.
Generally, contact sites, taps, and their placement will have some impact on each specific electrical transfer function of the voltage divider and, thus, will vary the actual transfer function from the transfer function of an ideal voltage divider. It is desirable to lessen the impact that output connections have on a transfer function of a resistor voltage divider. Furthermore, the impact of output connections is generally more severe in nonlinear voltage dividers than in linear voltage dividers. Therefore, it is desirable to lessen the impact of taps in nonlinear voltage dividers such as, for example, voltage dividers that allow logarithmic attenuation.
Microelectronic linear voltage dividers are generally made by providing linearly spaced output taps along the resistor body, while microelectronic nonlinear voltage dividers are generally made by providing nonlinear spacing of the output taps of a voltage divider. Alternatively, it is known in the art to provide a series of linearly spaced taps where all taps are accessible to the user, and allow a user to select the specific desired output taps. Thus, a user may use a voltage divider that has linearly spaced taps as a nonlinear voltage divider by only selecting outputs that have substantially nonlinearly related transfer functions. Furthermore, by providing only linear spaced outputs, a desired output voltage that requires nonlinear spacing of taps can only be approximated. Though such systems may lessen the impact of tap resistance, excess circuitry space may be consumed because these systems may allow the user to access every tap, and thus, every tap has some corresponding access and decoding interconnects and circuitry. It is, therefore, desirable to lessen the impact resulting from tap connections while limiting the amount of circuit space and complexity, and provide a very accurate representation of the desired nonlinearly related transfer functions.
Differential amplifiers made be designed in a variety of ways. FIG. 22 shows a schematic of a prior art "folded-cascode" amplifier. An example of a folded cascode amplifier is shown and described in Analysis and Design of Analog Integrated Circuits, 2nd Ed., pages 752-755, Paul Gray and Robert Meyer (1984). Two differential input transistors 1000A and 1010A are provided having their sources connected together and tied to the drain of transistor 2010A. The gate of transistor 2010A is biased such that it supplies the tail current source of the input differential pair, transistors 1000A and 1010A. Transistors 3000A and 3010A supply a current to the drain connection of the input pair transistors 1000A and 1010A and also to the source connection of transistors 3020A and 3030A. The value of the current flowing into the source connection of transistor 3020A is approximately equal to the value of the current flowing in transistor 3000A minus one half the current flowing in transistor 2010A. Likewise, the value of the current flowing into the source connection of transistor 3030A is equal to the value of the current flowing in transistor 3010A minus one half the current flowing in transistor 2010A. Transistors 3040A and 3050A form a current mirror such that the current flowing in transistor 3020A is mirrored to the output of the amplifier. Thus, the output current of the amplifier is the current flowing in transistor 3030A minus the current flowing in transistor 3020A.
Transistors 4000A through 4070A are cascode transistors for the transistors that are connected to their respective sources. Though transistors 4000A through 4070A are not required for the amplifier to work, adding these transistors improves the intrinsic offset of the amplifier and increases the dc gain of the amplifier. Another advantage obtained by adding transistors 4000A and 4010A is that the gate bias voltage of transistors 4000A and 4010A can be slaved to the input common mode voltage such that the drain to source voltage of transistors 1000A and 1010A does not change with an input common mode signal. Such gate biasing of transistors 4000A and 4010A helps input common mode rejection but does not cancel all sources of error due to a varying input common mode voltage.
A "folded-cascode" amplifier has several sources of error due to a varying input common mode voltage. All these sources of error have an equivalent effect of causing the current in transistor 10 to be different than the current in transistor 11.
U.S. Pat. No. 5,239,210 to Scott, which is expressly incorporated herein by reference, describes an amplifier that attempts to keep the current in the input transistor pair and the drain to source voltage of the input pair constant by using a localized feedback loop around each transistor of the input pair. Scott's circuit topology is an attempt to provide an amplifier with good input common mode voltage over a higher frequency range than an amplifier that does not have such localized feedback loops. Scott's circuit topology has two low frequency nodes in the differential signal path and an input common mode voltage range of Vss+2Vdsat+Vt to Vcc-(Vdsat+Vt).
FIG. 23 is a schematic of a prior art amplifier with a feedback loop to cancel input common mode error signals as described by Scott. This amplifier has a different topology than a "folded-cascode" amplifier.
In FIG. 23, transistors 1000B and 1010B form the input differential pair. Transistor 2010B forms the tail current source for the input differential pair. Transistors 3000B and 3010B form a current source load for the input differential pair, transistors 1000B and 1010B. Transistors 4000B and 4010B are cascode transistors for the input differential pair, transistors 1000B and 1010B. Transistors 6000B and 6010B are the output transistors of the input stage. Transistor 3040B and 3050B form a current mirror such that the current flowing in transistor 6000B is mirrored to the output of the amplifier. Thus, the output current of the amplifier is the current flowing in transistor 6010B minus the current flowing in transistor 6000B. Transistors 7000B, 7010B, and 7020B form the input common mode feedback loop.
Transistors 7000B and 7010B act in a negative feedback fashion to keep the current in transistors 1000B and 1010B equal to the current flowing in transistors 3000B and 3010B. Transistor 7020B acts as the gate bias voltage generator for transistors 4000B and 4010B. This gate bias voltage generator is slaved to the input common mode voltage and performs the function of keeping a constant drain to source voltage on the input differential pair, transistors 1000B and 1010B.
The frequency response of any amplifier is generally dominated by what is known as the low frequency poles of the circuit. In the differential signal path of the amplifier shown in FIG. 23, the dominant low frequency poles are located at the output node "OUTPUT" and nodes "A" and "B". Nodes "A" and "B" also form the dominant low frequency poles of the common mode feedback path.
A "folded-cascode" amplifier does not have good high frequency input common mode voltage rejection as the amplifier disclosed in Scott. But, a "folded-cascode" amplifier has a wider input common mode voltage range of Vss+2Vdsat+Vt to Vdd-Vdsat, and has only one low frequency node in the differential signal path.